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Nvidia Vera CPU white paper discloses 88 Olympus cores and first SPEC CPU 2026 results edging AMD EPYC 9755 by 3%

· by Pondero Newsdesk

The short version

Nvidia published detailed architecture specs for the Vera CPU on July 21, 2026, revealing a monolithic 88-core design with 1.2 TB/s memory bandwidth and self-reported benchmark scores that lead AMD EPYC 9755 only when tested with GCC, not AMD's own compiler.

Nvidia Vera CPU white paper discloses 88 Olympus cores and first SPEC CPU 2026 results edging AMD EPYC 9755 by 3%

Nvidia published a detailed white paper and technical blog on July 21 for the Vera CPU, its first custom processor architecture, revealing 88 Olympus cores on a monolithic die, 1.2 TB/s of memory bandwidth, and the company's first publicly disclosed SPEC CPU 2026 results. The benchmark advantage over AMD EPYC 9755 turns on which compiler runs the AMD chip.

What Nvidia disclosed

The Vera CPU pairs 88 Olympus cores with 176 hardware threads on a monolithic die, using Nvidia's Spatial Multithreading scheme. Per Nvidia's technical blog, the chip carries 164 MB of unified L3 cache shared across all cores, delivers 1.2 TB/s of memory bandwidth through SOCAMM2 LPDDR5X modules, and sustains 3.4 TB/s of internal fabric bandwidth via the Scalable Coherency Fabric. Addressable memory scales to 1.5 TB; TDP spans 250 to 450 watts.

The Olympus core targets agentic AI workloads rather than general server throughput. Its front end uses a neural branch predictor capable of issuing two taken branches per cycle and a 10-wide decode engine. Nvidia also disclosed a graph prefetcher designed to pre-resolve pointer chains before memory addresses fully settle, an approach that ServeTheHome's architectural analysis notes has no direct equivalent in current AMD or Intel designs.

Connectivity includes dual-socket scaling via NVLink-C2C at 1.8 TB/s per link, PCIe 6.4 (176 lanes dual-socket), CXL 3.1 for memory pooling, and Confidential Computing built on Arm CCA/RME with per-VM encryption keys.

On SPEC CPU 2026: Nvidia reported a dual-socket Vera SPECrate2026_int_base score of 925, against 898 for a dual-socket AMD EPYC 9755. ServeTheHome checked the official SPEC.org results page and found EPYC 9755 systems compiled with AMD's own toolchain scoring over 1,000 points, with Turin Dense systems (EPYC 99x5) reaching over 1,200. Nvidia has not submitted its results to the official SPEC.org database or published floating-point benchmarks for Vera.

Why it matters

The 3% SPEC edge Nvidia reported over AMD EPYC 9755 narrows or disappears once AMD's compiler enters the picture. Buyers looking at Vera as a server CPU should treat Nvidia's 925-vs-898 comparison as a floor, not a ceiling, for what the competition can achieve. The cleaner data point will come when Nvidia submits to the SPEC.org results database with full compiler and configuration disclosures.

The monolithic die is a more durable differentiator. Vera's 164 MB L3 cache sits on a single die shared by all 88 cores, avoiding the cross-die latency that chiplet-based AMD and Intel designs accumulate when threads exchange data across die boundaries. For agent workloads that shuttle state among sandboxes, retrieval indexes, and tool execution, low cache latency matters more than raw core count. Whether that architectural advantage translates to production throughput gains is a question that third-party benchmarks have not yet answered.

Nvidia also claimed up to 1.8x higher performance on agentic workloads versus x86 CPUs, per its own internal measurements in the white paper. That figure has not been replicated by outside parties.

What to watch next

No major cloud provider had announced Vera-CPU-based instance types as of July 22. Adoption by AWS, Azure, or GCP would signal that Nvidia's server CPU ambitions have cleared the internal DGX and HGX use cases. The other milestone is an official SPEC.org submission from Nvidia, which would expose the compiler and configuration details behind the 925 score and make the AMD comparison possible on equal terms.

Sources